Carry-chain propagation delay impacts on resolution of FPGA-based TDC

The architecture of carry chains in Field-Programmable Gate Array （FPGA） is introduced in this paper. The propagation delay time of the rising and falling edges in the carry chains are calculated according to the archi- tecture and they are predicted not equal in most cases. Tests show that the meas...

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Bibliographic Details
Published in:核技术（英文版） 2014-06, Vol.25 (3), p.38-42
Main Author: 董磊 杨俊峰 宋克柱
Format: Article
Language:English
Subjects:
Altera公司
FPGA
TDC
传播延迟
分辨率
延迟时间
现场可编程门阵列
进位链
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Summary:The architecture of carry chains in Field-Programmable Gate Array （FPGA） is introduced in this paper. The propagation delay time of the rising and falling edges in the carry chains are calculated according to the archi- tecture and they are predicted not equal in most cases. Tests show that the measuring results of the propagation delay time in EP3C 120F484C8N series FPGA of Altera are in line with the inference. The difference of propa- gation delay time results in different accuracies of Time-to-Digital Converter （TDC）. This phenomenon shall be considered in the design of TDC implemented in FPGA. It can ensure better accuracy.
ISSN:1001-8042
2210-3147
DOI:10.13538/j.1001-8042/nst.25.030401