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Pulse width modulation schemes enabling single DC power source driven dual two-level voltage source inverter with single voltage source inverter switching
Three-level voltage space phasor can be obtained using a dual two-level voltage source inverter (VSI). Two zero sequence voltage elimination pulse width modulation (PWM) switching variants are proposed in this paper for complete elimination of zero sequence voltage (ZSV) in the dual-VSI scheme. Both...
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Published in: | IET power electronics 2014-05, Vol.7 (5), p.1181-1191 |
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Main Authors: | , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Request full text |
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Summary: | Three-level voltage space phasor can be obtained using a dual two-level voltage source inverter (VSI). Two zero sequence voltage elimination pulse width modulation (PWM) switching variants are proposed in this paper for complete elimination of zero sequence voltage (ZSV) in the dual-VSI scheme. Both the PWM variants are designed in such a way that only one inverter is switched at any instant of time; to ensure that switching power losses in the dual-VSI is limited to one inverter only at any instant of time. Analytical expressions for the dwell times of the dual-VSI are developed and presented that successfully forces the ZSV in the dual-VSI to zero; at all instants of time. As a result, both the PWMs facilitate the dual-VSI to be driven from a single DC power source only. The implementation of the proposed PWM algorithms is greatly simplified and involves just the use of instantaneous magnitudes of the reference space vector. The implementation of PWMs totally avoids the time consuming task of sector identification and do not use look up tables. The PWMs proposed in this paper are first analysed, simulated using MATLAB/SIMULINK and then verified experimentally to validate the proposed PWMs. |
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ISSN: | 1755-4535 1755-4543 1755-4543 |
DOI: | 10.1049/iet-pel.2013.0283 |