Nanogap Channel and Reconfigurable Split-Gate Logic Achieved via Nano Scissoring on Ambipolar MoTe2 Transistors

• Published in: ACS applied electronic materials 2024-07, Vol.6 (7), p.5339-5346
• Main Authors: Lee, Minjong, Yu, Si Eun, Lim, June Yeong, Kim, Hyun-Jung, Im, Seongil, Lee, Young Tack
• Format: Article
• Language: English
• ISSN: 2637-6113; 2637-6113
• DOI: 10.1021/acsaelm.4c00969

Nanogap engineering is developed for nanogap-induced field-effect transistors (FETs) and reconfigurable logic gates with ultrathin ambipolar 2H-MoTe2 channels. Via nanowire scissor technique, ∼50 nm nanogap channel FET and nanogap-driven spilt-gate (SG) FET are achieved at ease. Our 50 nm channel might be long for 4 nm-thin channel MoTe2, so that the short channel effect may be exempted; theoretical calculation results in a characteristic channel length λ of only 14 nm. However, it seems not long enough for a 12 nm-thick channel FET, which reveals visible short channel effects along with an increased λ (∼25 nm). It means that λ is not a strict standard, and much longer channel is necessary to practically prevent short channel effects. By the same nanogap technique, SG electrodes on a dielectric are fabricated to control the polarity of two separated channel locations. Reconfigurable functions are secured; NAND, OR, XOR, and SAND are nicely demonstrated by connecting two SG devices in series. These logic circuits are achieved with no change of device architecture but by properly arranging the connections and bias probing. Our nanogap device engineering is regarded as recommendable, showing its own benefits toward multifunctional devices, fabrication simplicity, and device architecture for the short channel study.