Back Cover: Ultralow‐power in‐memory computing based on ferroelectric memcapacitor network (EXP2 3/2023)

The authors demonstrate a robust memcapacitor by stacking a ferroelectric capacitor on a metal‐insulator‐semiconductor structure. In‐memory vector‐matrix multiplication is achieved using a ferroelectric memcapacitor array. During the in‐memory computing, it intrinsically consumes zero energy in memc...

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Bibliographic Details
Published in:Exploration (Beijing, China) China), 2023-06, Vol.3 (3), p.n/a
Main Authors: Tian, Bobo, Xie, Zhuozhuang, Chen, Luqiu, Hao, Shenglan, Liu, Yifei, Feng, Guangdi, Liu, Xuefeng, Liu, Hongbo, Yang, Jing, Zhang, Yuanyuan, Bai, Wei, Lin, Tie, Shen, Hong, Meng, Xiangjian, Zhong, Ni, Peng, Hui, Yue, Fangyu, Tang, Xiaodong, Wang, Jianlu, Zhu, Qiuxiang, Ivry, Yachin, Dkhil, Brahim, Chu, Junhao, Duan, Chungang
Format: Article
Language:English
Online Access:Get full text
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Summary:The authors demonstrate a robust memcapacitor by stacking a ferroelectric capacitor on a metal‐insulator‐semiconductor structure. In‐memory vector‐matrix multiplication is achieved using a ferroelectric memcapacitor array. During the in‐memory computing, it intrinsically consumes zero energy in memcapacitors themselves. It sheds light on an ultralow‐power neuromorphic hardware based on ferroelectric memcapacitors.
ISSN:2766-8509
2766-2098
2766-2098
DOI:10.1002/EXP.20210484