Silicon Chip Interfaced with a Geometrically Defined Net of Snail Neurons

• Published in: Advanced functional materials 2005-05, Vol.15 (5), p.739-744
• Main Authors: Merz, M., Fromherz, P.
• Format: Article
• Language: English
• Subjects: Bioelectronics; Neural networks; Semiconductors; Semiconductors, silicon; silicon
• ISSN: 1616-301X; 1616-3028
• DOI: 10.1002/adfm.200400316

We have successfully interfaced living neuronal networks with a defined geometry of synaptic connections to a semiconductor chip, enabling a non‐invasive supervision of network activity at a single‐cell level. Two networks of two and four neurons are presented and the signaling pathways are discussed. The outgrowth of neurons from the pond snail Lymnaea stagnalis and the formation of synapses are controlled by topographical structures processed from a polyester resist. Action potentials are evoked in individual neurons by capacitive stimulators integrated in the chip. They propagate along guided neurites, pass through electrical synapses, and trigger postsynaptic excitations that are recorded by field‐effect transistors. The networks represent proof‐of‐principle experiments for the development of complex hybrid neuroelectronic devices for applications in brain research, pharmacology, and information technology. Networks of snail neurons are grown in grooves of a polyester resist on a silicon chip as shown in the Figure. Their electrical activity is controlled by two‐way contacts with capacitors and transistors. The bottom‐up design of topologically defined neuronal nets with non‐invasive supervision from the semiconductor chip reveals a fundamental problem of yield.