HW-SW co-design of image classification accelerator on FPGA: HW-SW co-design of image classification accelerator on FPGA

Convolutional Neural Networks (CNNs) proved highly successful in various applications, including image classification. CNNs demand a massive number of mathematical operations that represent a challenge in hardware implementation, especially for limited-resource devices or edge-computing devices. Thi...

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Bibliographic Details
Published in:The Journal of supercomputing 2025-05, Vol.81 (8), p.941, Article 941
Main Authors: Sayed, Ratshih, Draz, H. H., Azmi, Haytham
Format: Article
Language:English
Subjects:
Access time
Accuracy
Artificial neural networks
Classification
Co-design
Compilers
Computer Science
Edge computing
Field programmable gate arrays
Hardware
Image classification
Intellectual property
Interpreters
Neural networks
Processor Architectures
Programming Languages
Propagation
Representations
Software
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