A method to assess the robustness of cryptographic circuits at the design stage

This paper proposes the use of an FPGA-based fault injection technique, AMUSE, to study the effect of malicious attacks on cryptographic circuits. Originally, AMUSE was devised to analyze the soft error effects (SEU and SET) in digital circuits. However, many of the fault-based attacks used in crypt...

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Bibliographic Details
Published in:Microelectronics 2014-10, Vol.45 (10), p.1354-1360
Main Authors: Arévalo-Garbayo, M., Portela-García, M., García-Valderas, M., López-Ongil, C., Entrena, L.
Format: Article
Language:English
Subjects:
Cryptographic circuits
Differential fault attacks
Fault injection
Fault-based attack
Single event transient
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Summary:This paper proposes the use of an FPGA-based fault injection technique, AMUSE, to study the effect of malicious attacks on cryptographic circuits. Originally, AMUSE was devised to analyze the soft error effects (SEU and SET) in digital circuits. However, many of the fault-based attacks used in cryptanalysis produce faults that can be modeled as bit-flip in memory elements or transient pulses in combinational logic, as in faults due to radiation effects. Experimental results provide information that allows the cryptographic circuit designer to detect the weakest areas in order to implement countermeasures at design stage.
ISSN:1879-2391
1879-2391
DOI:10.1016/j.mejo.2013.12.012