Influences of lattice strain and SiGe buffer layer thickness on electrical characteristics of strained Si/SiGe/Si(110) heterostructures

• Published in: Materials science in semiconductor processing 2023-07, Vol.161, p.107476, Article 107476
• Main Authors: Fujisawa, Taisuke, Onogawa, Atsushi, Horiuchi, Miki, Sano, Yuichi, Sakata, Chihiro, Yamanaka, Junji, Hara, Kosuke O., Sawano, Kentarou, Nakagawa, Kiyokazu, Arimoto, Keisuke
• Format: Article
• Language: English
• ISSN: 1369-8001; 1873-4081
• DOI: 10.1016/j.mssp.2023.107476

In previous studies, we reported on significantly high hole mobility in a strained Si/SiGe/Si(110) heterostructure pMOSFET. In this study, we investigated impact of strain on the hole mobility in this structure. 20-nm thick (110)-oriented strained Si films with different strain levels were formed using solid-source molecular beam epitaxy. A positive correlation between the hole mobility and the strain of the Si layer is verified. It is also shown that formation of growth twins and strain relaxation of SiGe layer in the [1‾10] direction deteriorate the hole mobility. The maximum mobility enhancement factor obtained in this study is about 3. In addition, the influence of the SiGe layer thickness on the off-state leakage current in pMOSFET operation is discussed. It is found that the upper part of the thick SiGe samples includes cause of the leakage current, indicating change of conductivity with the progress of the crystal growth of SiGe layer. This phenomenon is related to the formation process of the crystalline defects. Another finding is the existence of a current path through the substrate, which suggests a defect-assisted current flow across the SiGe/n-Si(110) junction.