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A biphasic current-mode stimulator integrated circuit with a novel residual charge compensation mechanism
A mixed-signal four-channel biphasic current-mode functional electrical stimulator chip with a novel charge compensation circuit is presented in this paper. This chip can induce programmable biphasic current ranging from 10 μA to 2.56 mA for each channel. However, a significant problem with function...
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Published in: | Integration (Amsterdam) 2023-07, Vol.91, p.79-88 |
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Main Authors: | , , , , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | A mixed-signal four-channel biphasic current-mode functional electrical stimulator chip with a novel charge compensation circuit is presented in this paper. This chip can induce programmable biphasic current ranging from 10 μA to 2.56 mA for each channel. However, a significant problem with functional electrical stimulation is charge balancing (CB) due to anodic and cathodic current mismatch for process variation. Therefore, a novel compensation module including both passive and active charge compensation schemes are adopted in this chip. The charge compensation module autonomously adjusts the supply and compensation current to achieve fast compensation and low-power consumption simultaneously. The proposed biphasic stimulator is designed and fabricated in a 0.18 μm CMOS process with a die area of 2.27 mm × 1.99 mm. The measurement results from a test bench demonstrate the proposed circuit functionalities, and the standby power consumption of this chip is 193.7 μW. Besides, animal experiments on mice for seizure suppression with deep brain stimulation were performed to verify the efficacy and safety of the developed stimulation chip.
•A biphasic current-mode electrical stimulator with charge compensation is presented.•A novel module including both passive and active charge compensation schemes is adopted in this chip.•The proposed biphasic stimulator is designed and fabricated in a 0.18 μm CMOS process.•Fast residual charge compensation and low power consumption module implemented.•Animal experiments were performed to verify the efficacy and safety of the developed stimulator. |
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ISSN: | 0167-9260 1872-7522 |
DOI: | 10.1016/j.vlsi.2023.03.003 |