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FPGA Accelerator for Meta-Recognition Anomaly Detection: Case of Burned Area Detection

Optical remote sensing instruments accumulate abundant data from across all Earth's land surfaces, making it possible both to understand the effects of climate change and to monitor, investigate and manage ground-level events in detail. Processing data using resources located near on-board sate...

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Bibliographic Details
Published in:IEEE journal of selected topics in applied earth observations and remote sensing 2023-01, Vol.16, p.1-13
Main Authors: Coca, Mihai, Datcu, Mihai
Format: Article
Language:English
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Summary:Optical remote sensing instruments accumulate abundant data from across all Earth's land surfaces, making it possible both to understand the effects of climate change and to monitor, investigate and manage ground-level events in detail. Processing data using resources located near on-board satellite sensors can bring major benefits in terms of minimizing analysis time and quickly initiating active actions in critical situations. In satellite missions, long-term production on-board algorithms may encounter unexplored samples, i.e., abnormal ground-level events, and need to be able to discriminate and take the correct action. In this matter, the authors present a field programmable gate array (FPGA)-based solution for natural anomaly detection in multispectral imagery using deep convolutional neural networks. The effects of weather-induced hazards and natural disasters, considered anomalies in this sense, are discovered by modeling an anomaly detector on a hybrid system that is hardware efficient. The proposed approach is assembled on a Xilinx Zynq UltraScale+ XCZU9EG Multi-Processor System-on-Chip (MPSoC) device, where a deep convolutional model is scaled into the FPGA logic, followed by a downstream statistical meta-recognition predictor. The proposed anomaly detection accelerator has produced notable results on identifying a contemporary natural hazard, i.e., burned areas, in scenes acquired by Sentinel-2 over Europe, i.e., Spain and France. The implemented algorithm achieved on the FPGA accelerator an equivalent speedup of 4.46x and 4.5x lower power consumption than the equivalent implementation on the Tesla K80 GPU.
ISSN:1939-1404
2151-1535
DOI:10.1109/JSTARS.2023.3273309