STONNE: Enabling Cycle-Level Microarchitectural Simulation for DNN Inference Accelerators

The design of specialized architectures for accelerating the inference procedure of Deep Neural Networks (DNNs) is a booming area of research nowadays. While first-generation rigid accelerator proposals used simple fixed dataflows tailored for dense DNNs, more recent architectures have argued for fl...

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Bibliographic Details
Published in:IEEE computer architecture letters 2021-07, Vol.20 (2), p.122-125
Main Authors: Munoz-Martinez, Francisco, Abellan, Jose L., Acacio, Manuel E., Krishna, Tushar
Format: Article
Language:English
Subjects:
Accelerators
Analytical models
Artificial neural networks
Bandwidth
Computational modeling
computer architecture ?
Deep learning
DNN accelerators
Hardware simulation
Inference
Mathematical model
Mathematical models
Microarchitecture
specific hardware for deep learning
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Summary:The design of specialized architectures for accelerating the inference procedure of Deep Neural Networks (DNNs) is a booming area of research nowadays. While first-generation rigid accelerator proposals used simple fixed dataflows tailored for dense DNNs, more recent architectures have argued for flexibility to efficiently support a wide variety of layer types, dimensions, and sparsity. As the complexity of these accelerators grows, the analytical models currently being used prove unable to capture execution-time subtleties, thus resulting inexact in many cases. We present STONNE ( S imulation TO ol of N eural N etwork E ngines ), a cycle-level microarchitectural simulator for state-of-the-art rigid and flexible DNN inference accelerators that can plug into any high-level DNN framework as an accelerator device, and perform full-model evaluation of both dense and sparse real, unmodified DNN models.
ISSN:1556-6056
1556-6064
DOI:10.1109/LCA.2021.3097253