Temperature Effect Inversion-Aware Power-Performance Optimization for FinFET-Based Multicore Systems

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems 2017-11, Vol.36 (11), p.1897-1910
• Main Authors: Ermao Cai, Marculescu, Diana
• Format: Article
• Language: English
• Subjects: Delays; FinFET; FinFETs; Logic gates; Multicore processing; multicore systems; Optimization; performance optimization; power management; power modeling and estimation; Runtime; temperature effect inversion (TEI); Throughput
• ISSN: 0278-0070; 1937-4151
• DOI: 10.1109/TCAD.2017.2666721

Energy and temperature are the main constraints for modern high-performance multicore systems. To save power or increase performance, dynamic voltage and frequency scaling (DVFS) is widely applied in literally all computing systems. As CMOS technology continues scaling, FinFET has recently become the common choice for multicore systems. In contrast with planar CMOS, FinFET is characterized by lower delay under higher temperatures in super-threshold voltage region, an effect called temperature effect inversion (TEI). This paper explores TEI-aware performance improvement and energy savings for multicore systems. Our experimental results show that on average 15.70% throughput improvement or 31.26% energy savings can be achieved in steady state by a TEI-aware DVFS policy over a TEI-agnostic one. By further investigation, multiple sweet spots (SSs) resulting from TEI effects are observed. Based on these SS operation regimes, this paper introduces fast algorithms which provide iso-power maximum performance or iso-performance minimum energy consumption. Experimental results confirm the effectiveness of the proposed approach by exhibiting a 45.9× -55.3× speedup when compared to state-of-the-art algorithms while losing only 0.22% or 0.68% in achieved performance or energy, respectively.