A Novel Gradient Driver Circuit with Composite Converter Structure for MRI

• Published in: IEEE transactions on industry applications 2024-10, p.1-12
• Main Authors: Zhang, Dandi, Ding, Hongfa, He, Zhou, Huang, Siqi, Song, Yongxiu
• Format: Article
• Language: English
• Subjects: Composite Converter; Flat-top Magnetic Field; Gradient Amplifier; Gradient Driver; High Precision Current Source; High-voltage techniques; Inductors; Magnetic fields; Magnetic resonance imaging; Power supplies; Stability criteria; Stress; Switches; Switching-Loss Reduction; Topology; Voltage
• ISSN: 0093-9994; 1939-9367
• DOI: 10.1109/TIA.2024.3472638

The gradient driver is a crucial component of Magnetic Resonance Imaging (MRI) instruments, primarily responsible for generating magnetic field gradients used for spatial localization and imaging. The gradient driver typically generates a current with a short rising stage and short falling stage as well as a high precision and high stability. Conventional gradient driver schemes employ H-bridges with high-voltage DC voltage source to generate the required current waveform. In these schemes, switching devices operate at extremely high switching frequencies and must withstand exceptionally high voltage and current stresses. In order to address this technical issue, this paper proposes a novel topology that utilizes composite converter structure to generate the output current. Compared to conventional topologies, this approach significantly reduces the operating frequency of all switching devices, resulting in reduced switching losses and enhanced stability. Additionally, this novel topology also reduces current and voltage stresses on highspeed switching devices, lowering their selection requirements and overall cost. Parameter design and topology analysis are made aimed for a typical waveform of 2000 A peak current, 20 ms flat-top, 1000 ppm stability, 500 μs rising-edge and fallingedge period. A full-scale simulation and a down-scale experiment of 200 A peak current, 30 ms flat-top, 10000 ppm stability, 1200 μs rising edge, and falling edge period have been conducted for both conventional topology and proposed topology to validate the advantages of the proposed topology. Simulation results, as well as experimental results, both verified the proposed topology's advantages in lower switching frequency and less current and voltage stresses of the high-speed switching devices. All these factors combined contribute to a significantly lower switching loss