A Semi-Supervised and Incremental Modeling Framework for Wafer Map Classification

Wafer map analysis provides critical information for quality control and yield improvement tasks in semiconductor manufacturing. In particular, wafer patterns of gross failing areas (GFA) are important clues to identify the causes of relevant failures during the manufacturing process. In this work,...

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Bibliographic Details
Published in:IEEE transactions on semiconductor manufacturing 2020-02, Vol.33 (1), p.62-71
Main Authors: Kong, Yuting, Ni, Dong
Format: Article
Language:English
Subjects:
Acceleration
Artificial neural networks
Classification
Decoding
Feature extraction
ladder network
Learning curves
Manufacturing
Noise reduction
Quality control
semi-supervised classification
Semiconductor device modeling
semiconductor manufacturing
Unsupervised learning
variational autoencoder
Wafer map
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Summary:Wafer map analysis provides critical information for quality control and yield improvement tasks in semiconductor manufacturing. In particular, wafer patterns of gross failing areas (GFA) are important clues to identify the causes of relevant failures during the manufacturing process. In this work, a semi-supervised classification framework is proposed for wafer map analysis, and its application to wafer bin maps with GFA patterns classification is demonstrated. The Ladder network and the semi-supervised variational autoencoder are adopted to classify wafer bin maps in comparison with a standard convolutional neural network (CNN) model on two real-world datasets. The results have illustrated that two semi-supervised models are consistently and substantially better than the CNN model across various training data percentages by effective utilization of the unlabeled data. Active learning and pseudo labeling are also utilized to accelerate the learning curve.
ISSN:0894-6507
1558-2345
DOI:10.1109/TSM.2020.2964581