Power complexity of multiplexer-based optoelectronic crossbar switches

The integration of thousands of optical input/output (I/O) devices and large electronic crossbar switching elements onto a single optoelectronic integrated circuit (IC) can place stringent power demands on the CMOS substrates. Currently, there is no sufficiently general analytic methodology for powe...

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Bibliographic Details
Published in:IEEE transactions on very large scale integration (VLSI) systems 2005-05, Vol.13 (5), p.604-617
Main Authors: Szymanski, T.H., Honglin Wu, Gourgy, A.
Format: Article
Language:English
Subjects:
Applied sciences
Broadcast
Circuit properties
CMOS
CMOS integrated circuits
CMOS technology
crossbar
Design. Technologies. Operation analysis. Testing
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Exact sciences and technology
Integrated circuits
Integrated optics
Integrated optoelectronics. Optoelectronic circuits
Large-scale systems
optical
Optical and optoelectronic circuits
Optical devices
Optical switches
optoelectronic
Optoelectronic devices
Photonic integrated circuits
power
Power demand
Power dissipation
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
switch
Switching circuits
Switching, multiplexing, switched capacity circuits
Terabit
VCSEL
VLSI
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Summary:The integration of thousands of optical input/output (I/O) devices and large electronic crossbar switching elements onto a single optoelectronic integrated circuit (IC) can place stringent power demands on the CMOS substrates. Currently, there is no sufficiently general analytic methodology for power analysis and power reduction of large-scale crossbar switching systems. An analysis of the power complexity of single-chip optoelectronic switches is presented, assuming the classic broadcast-and-select crossbar architecture. The analysis yields the distribution of power dissipation and allows for design optimization. Both unpipelined and pipelined designs are analyzed, and a technique to reduce power dissipation significantly is proposed. The design of a 5.12 Tbit single-chip optoelectronic switch using 0.18-/spl mu/m CMOS technology is illustrated. The pipelined switch design occupies < 70 mm/sup 2/ of CMOS area, and consumes
ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2005.844285