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Suppressed Thermally Induced Flatband Voltage Instabilities with Binary Noble Metal Gated Metal--Oxide--Semiconductor Capacitors
We investigated thermally induced flatband voltage ($V_{\text{FB}}$) instabilities with single noble metals (Pt, Ir, Pd), their binary metal (IrPt) and control TiN used for gate electrodes in metal oxide semiconductor devices with atomic layer deposited HfO 2 gate dielectric. As-deposited e-beam eva...
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Published in: | Japanese Journal of Applied Physics 2012-02, Vol.51 (2), p.02BA05-02BA05-4 |
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Main Authors: | , , |
Format: | Article |
Language: | English |
Citations: | Items that this one cites |
Online Access: | Get full text |
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Summary: | We investigated thermally induced flatband voltage ($V_{\text{FB}}$) instabilities with single noble metals (Pt, Ir, Pd), their binary metal (IrPt) and control TiN used for gate electrodes in metal oxide semiconductor devices with atomic layer deposited HfO 2 gate dielectric. As-deposited e-beam evaporated noble metals and sputtered TiN gated devices show near band-edge p-type metal--oxide--semiconductor (pMOS) characteristics and higher $V_{\text{FB}}$ than midgap value, respectively. After 450 °C at 30 min forming gas anneal, $V_{\text{FB}}$ of devices with e-beam evaporated single metals and sputtered TiN is substantially shifted toward mid-gap position, indicating thermally induced $V_{\text{FB}}$ instability. However, device with binary metal alloy gate shows suppressed $V_{\text{FB}}$ shifts and work-function as high as 4.95 eV is attained with 450 °C at 30 min FGA. It can be explained by oxygen diffusion within gate stack structure into interfacial layer (IL) between Si and HfO 2 during anneal, leading to thicker IL and vacancy generation in dielectric. |
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ISSN: | 0021-4922 1347-4065 |
DOI: | 10.1143/JJAP.51.02BA05 |