Power efficient refined seizure prediction algorithm based on an enhanced benchmarking

Deep learning techniques have led to significant advancements in seizure prediction research. However, corresponding used benchmarks are not uniform in published results. Moreover, inappropriate training and evaluation processes used in various work create overfitted models, making prediction perfor...

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Bibliographic Details
Published in:Scientific reports 2021-12, Vol.11 (1), p.23498-23498, Article 23498
Main Authors: Wang, Ziyu, Yang, Jie, Wu, Hemmings, Zhu, Junming, Sawan, Mohamad
Format: Article
Language:English
Subjects:
631/114/1305
631/114/1314
639/166/985
692/617/375/178
Algorithms
Benchmarking - methods
Benchmarks
Data Collection
Deep Learning
Electroencephalography - methods
Humanities and Social Sciences
Humans
Long short-term memory
Memory, Long-Term - physiology
multidisciplinary
Neural networks
Neural Networks, Computer
Population Groups
Predictions
Science
Science (multidisciplinary)
Seizures
Seizures - physiopathology
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Summary:Deep learning techniques have led to significant advancements in seizure prediction research. However, corresponding used benchmarks are not uniform in published results. Moreover, inappropriate training and evaluation processes used in various work create overfitted models, making prediction performance fluctuate or unreliable. In this study, we analyzed the various data preparation methods, dataset partition methods in related works, and explained the corresponding impacts to the prediction algorithms. Then we applied a robust processing procedure that considers the appropriate sampling parameters and the leave-one-out cross-validation method to avoid possible overfitting and provide prerequisites for ease benchmarking. Moreover, a deep learning architecture takes advantage of a one-dimension convolutional neural network and a bi-directional long short-term memory network is proposed for seizure prediction. The architecture achieves 77.6% accuracy, 82.7% sensitivity, and 72.4% specificity, and it outperforms the indicators of other prior-art works. The proposed model is also hardware friendly; it has 6.274 k parameters and requires only 12.825 M floating-point operations, which is advantageous for memory and power constrained device implementations.
ISSN:2045-2322
2045-2322
DOI:10.1038/s41598-021-02798-8