Threads Pipelining on the CellBE Systems

This article aims to describe a model to accelerate the execution of a parallel algorithm implemented on a Cell B.E. processor. The algorithm implements a technique of finding a moving target in a maze with dynamic architecture, using another technique of pipelining the data transfers between the PP...

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Bibliographic Details
Published in:Advances in electrical and computer engineering 2013-01, Vol.13 (3), p.121-126
Main Authors: TANASE, Cristian Andy, GAITAN, Vasile Gheorghita
Format: Article
Language:English
Subjects:
Algorithms
Cell B.E
Computational efficiency
Dynamical systems
Dynamics
flip-flop buffer
Mathematical models
Microprocessors
Moving targets
Pipelining (computers)
PPU-SPU pipeline communication
threads
three level pipeline transfer
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Summary:This article aims to describe a model to accelerate the execution of a parallel algorithm implemented on a Cell B.E. processor. The algorithm implements a technique of finding a moving target in a maze with dynamic architecture, using another technique of pipelining the data transfers between the PPU and SPU threads. We have shown that by using the pipelining technique, we can achieve an improvement of the computing time (around 40%). It can be also seen that the pipelining technique with one SPU is about as good as the parallel technique with four SPUs.
ISSN:1582-7445
1844-7600
DOI:10.4316/AECE.2013.03019