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The art of temporal decoupling

Virtual Platforms (VPs) and Full-System Simulators (FSSs) are essential tools in modern Multiprocessor System on A Chip (MPSoC) development. Over the past two decades, the speed of these simulations has not kept pace with the increasing complexity of the systems being simulated, highlighting the nee...

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Bibliographic Details
Published in:Integration (Amsterdam) 2025-03, Vol.101, p.102314, Article 102314
Main Authors: Zurstraßen, Niko, Brandhofer, Ruben, Cubero-Cascante, José, Bosbach, Nils, Jünger, Lukas, Leupers, Rainer
Format: Article
Language:English
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Summary:Virtual Platforms (VPs) and Full-System Simulators (FSSs) are essential tools in modern Multiprocessor System on A Chip (MPSoC) development. Over the past two decades, the speed of these simulations has not kept pace with the increasing complexity of the systems being simulated, highlighting the need for faster simulation techniques. One widely used approach is Temporal Decoupling (TD), which allows parts of the simulation to run unsynchronized with the rest of the system for a period called the quantum. While a larger quantum improves simulation performance by reducing the number of synchronization and context switches, it also raises the risk of causality errors, leading to inaccuracies. Consequently, users of TD simulations may struggle to find the optimal quantum that balances accuracy and performance. In practice, the quantum is often chosen based on empirical knowledge, which, though sometimes effective, lacks a solid theoretical basis. This work addresses this gap by offering analytical estimations and deeper insights into the effects of TD. We also validate the proposed models using TD simulations in SystemC and gem5. •Performance/Speedup analytical model for temporally-decoupled simulations•Principles to understand and fine-tune temporally-decoupled simulations•Validation of the model using benchmarks in gem5- and SystemC-based simulations•Description of effects that cannot be captured by analytical models
ISSN:0167-9260
DOI:10.1016/j.vlsi.2024.102314