Timekeeping in the memory system: predicting and optimizing memory behavior

This paper offers afresh perspective on the problem of predicting and optimizing memory behavior. We show quantitatively the extent to which detailed timing characteristics of past memory reference events are strongly predictive of future program reference behavior. We propose a family of timekeepin...

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Bibliographic Details
Main Authors: Zhigang Hu, Kaxiras, S., Martonosi, M.
Format: Conference Proceeding
Language:English
Subjects:
Cache memory
Communication system software
Hardware
Performance analysis
Power dissipation
Prefetching
Proposals
Software performance
Software systems
Timing
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Summary:This paper offers afresh perspective on the problem of predicting and optimizing memory behavior. We show quantitatively the extent to which detailed timing characteristics of past memory reference events are strongly predictive of future program reference behavior. We propose a family of timekeeping techniques that optimize behavior based on observations about particular cache time durations, such as the cache access interval or the cache dead time. Timekeeping techniques can be used to build small, simple, and high-accuracy (often 90% or more) predictors for identifying conflict misses, for predicting dead blocks, and even for estimating the time at which the next reference to a cache frame will occur and the address that will be accessed. Based on these predictors, we demonstrate two new and complementary time-based hardware structures: (1) a time-based victim cache that improves performance by only storing conflict miss lines with likely reuse, and (2) a time-based prefetching technique that hones in on the right address to prefetch, and the right time to schedule the prefetch.
ISSN:1063-6897
2575-713X
DOI:10.1109/ISCA.2002.1003579