100 Gbit/s PAM-4 Linear Burst-Mode Transimpedance Amplifier for Upstream Flexible Passive Optical Networks

Next-generation passive optical networks (PONs) with upstream rates of 50 Gbit/s and beyond will require a new class of burst-mode transimpedance amplifiers (BMTIAs) that are linear to enable (digital) equalization of channel impairments. Such linear BMTIAs also enable higher-order modulation format...

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Bibliographic Details
Published in:Journal of lightwave technology 2023-06, Vol.41 (12), p.1-8
Main Authors: Coudyzer, Gertjan, Verplaetse, Michiel, Van Lombergen, Borre, Borkowski, Robert, Gurne, Thibaut, Straub, Michael, Lefevre, Yannick, Ossieur, Peter, Bonk, Rene, Coomans, Werner, Maes, Jochen, Yin, Xin
Format: Article
Language:English
Subjects:
4-level pulse amplitude modulation
access networks
Amplifiers
Avalanche diodes
Avalanche photodiodes
Burst-mode
Circuit design
Dynamic range
Light modulation
Optical amplifiers
Optical communication
Optical receivers
Optical signal processing
Optical transmitters
Passive optical networks
Photodiodes
Pulse amplitude modulation
Sensitivity
System-on-chip
transimpedance amplifiers
Upstream
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Summary:Next-generation passive optical networks (PONs) with upstream rates of 50 Gbit/s and beyond will require a new class of burst-mode transimpedance amplifiers (BMTIAs) that are linear to enable (digital) equalization of channel impairments. Such linear BMTIAs also enable higher-order modulation formats like 4-level pulse amplitude modulation (PAM-4). In this paper, we demonstrate operation of a novel linear BMTIA integrated together with a commercial off-the-shelf 25G-class avalanche photodiode (APD), achieving 50 Gbit/s non-return-to-zero (NRZ) operation with a sensitivity of -23.7 dBm optical modulation amplitude (OMA) and dynamic range exceeding 21.7 dB and 100 Gbit/s PAM-4 operation with a sensitivity of -15.8 dBm OMA and dynamic range exceeding 15.4 dB, both at a bit error ratio (BER) of 10^{-2}. In addition, fast burst-mode gain-control and balancing circuits limit loud-soft sensitivity penalties in the case of AC-coupled circuits to less than 1.3 dB. The chip was designed in a 0.13 \mum SiGe:C BiCMOS technology, has an area of 1.2×1.7 mm^{2} and consumes between 260 mW and 310 mW. This receiver paves the way to a next-generation class of BMTIAs, supporting the ITU-T G.9804.3 Amd 1 standard.
ISSN:0733-8724
1558-2213
DOI:10.1109/JLT.2023.3262319