Analysis and Optimization of Switched-Capacitor Piezoelectric Energy Harvesting Interface Circuits

• Published in: IEEE transactions on very large scale integration (VLSI) systems 2023-09, Vol.31 (9), p.1-14
• Main Author: Salem, Loai G.
• Format: Article
• Language: English
• Subjects: <inline-formula xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> <tex-math notation="LaTeX"> N</tex-math> </inline-formula>-path rectifiers; Bias-flip rectifier; Capacitors; Circuits; Energy harvesting; Equivalence; full-bridge rectifier (FBR); Impedance; Impedance matching; inductor-less; Input impedance; Integrated circuit modeling; Load modeling; Maximum power; Optimization; parallel synchronized switch harvesting on capacitor (P-SSHC); piezoelectric energy harvesting; Piezoelectric transducers; Rectifiers; RLC circuits; split-phase flipping-capacitor rectifier (SPFCR); switched-capacitor (SC); Vibrations; Voltage
• ISSN: 1063-8210; 1557-9999
• DOI: 10.1109/TVLSI.2023.3284429

Closed-form expressions for the output dc voltage and load power of commonly used switched-capacitor (SC) piezoelectric interface circuits are derived. The proposed analysis approach computes the equivalent impedance introduced by an interface circuit to a piezoelectric transducer (PT). The input impedance of an interface is estimated by evaluating the equivalent linear time-invariant (LTI) network of the periodically switched ac side in the interface circuit. The advantage of the proposed model is that it quantifies the improvement that a given interface circuit provides to the transducer source impedance independent of its load-controlled internal current. In addition, the optimal load value that maximizes the output power of an interface circuit can be readily found from the interface equivalent input impedance. Unlike prior approaches, the proposed analysis takes the transducer's internal resistance into account, which allows for determining the maximum achievable harvesting efficiency of an interface. Interestingly, it is found that the maximum power that a bias-flip rectifier can extract from a PT is limited to only 81% of the theoretical maximum power available under conjugate impedance matching. The developed analysis has been verified through circuit simulations.