Versatile Resource-shared Cryptographic Accelerator for Multi-Domain Applications

• Main Authors: Le, Vu Trung Duong, Pham, Hoai Luan, Tran, Thi Hong, Nguyen, Quoc Duy Nam, Thi, Sang Duong, Nakashima, Yasuhiko
• Format: Conference Proceeding
• Language: English
• Subjects: ASIC; blockchain; Computer architecture; Cryptography; Field programmable gate arrays; FPGA; IoT; Registers; resource-shared; Scalability; System-on-chip; Throughput
• ISSN: 2691-0462
• DOI: 10.1109/ICICDT59917.2023.10332303

SHA256, BLAKE256, BLAKE2s, Salsa20, and Chacha20 are crucial cryptographic algorithms used for data security in multi-domain applications. Consequently, there is a strong need for a flexible cryptographic hardware architecture that can efficiently handle various algorithms and provide excellent performance. Regrettably, existing cryptographic architectures do not meet the requirements for desired flexibility and high performance in these applications. Therefore, this paper introduces a novel resource-shared crypto accelerator (RCA) to achieve high flexibility and maximize hardware efficiency. The RCA applied two optimizations a register-sharing approach with multi-mode digest routers and an adder-sharing approach in flexible ALUs. Theoretical evaluation reveals that the RCA achieves 72% register sharing (104 out of 136) and 78.6% adder sharing (44 out of 56). Verification of RCA on Xilinx ZCU102 FPGA at the system-on-chip level is conducted to demonstrate its accuracy and efficacy. Furthermore, the RCA experimental results on multiple FPGAs show its remarkable flexibility and hardware efficiency. It outperforms existing works in terms of throughput (1.36-28.9 times) and area efficiency (1.14-2.45 times).