Safety-Guided Test Generation for Structural Faults

• Main Authors: Tan, Xuanyi, Thapar, Dhruv, Sahoo, Deepesh, Chaudhuri, Arjun, Banerjee, Sanmitra, Chakrabarty, Krishnendu, Parekhji, Rubin
• Format: Conference Proceeding
• Language: English
• Subjects: Benchmark testing; Circuit faults; Computational modeling; Integrated circuit modeling; Perturbation methods; Safety; Test pattern generators; Training; Wires
• ISSN: 2378-2250
• DOI: 10.1109/ITC51657.2024.00043

Many real-life safety-critical applications such as autonomous driving require functional safety. We present a framework for functional safety-guided test pattern generation. We incorporate the functional information of each standard cell into a multi-layer-perceptron (MLP), referred to as Cell-Net. Each Cell-Net is a pre-trained MLP that models the behavior of the corresponding standard cell. The design netlist is translated into its neural twin, where the standard cell instances are substituted by their corresponding Cell-Nets and the wires in the netlist translate to neural connections between these Cell-Nets. We leverage the neural twin-enabled back-propagation for gradient computation, and utilize these gradients to compute test patterns. The output of every Cell-Net is associated with a bias that represents a perturbation in the signal propagating through that Cell-Net. We manipulate these bias values to inject stuck-at faults at the output of Cell-Nets. We utilize the neural twin to enhance the propagation of faults to primary outputs (POs), and find the test patterns that maximize the propagation of faults to POs. The neural twin also enables the assignment of non-binary criticalityfactors (CFs) to different POs and perform a test-pattern search for each fault for a given CF configuration. Our results on five benchmark circuits across three different CF configurations show an increased fault propagation achieved by the neural twin as compared to Automatic Test Pattern Generation (ATPG).