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A 17.5-GHz 3-bit phase-shift receive MMIC-fabrication and test results

A high-yield, FET gate fabrication technology is described. The main advantage of this processing approach is that it permits fabrication of devices with gate lengths of less than 0.5 mu m using standard optical photolithography without recourse to deep UV or electron-beam lithography. The process i...

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Bibliographic Details
Published in:IEEE transactions on electron devices 1990-05, Vol.37 (5), p.1209-1216
Main Authors: Gupta, A.K., Korpinen, E.V., Chen, A.D., Matthews, D.S.
Format: Article
Language:English
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Summary:A high-yield, FET gate fabrication technology is described. The main advantage of this processing approach is that it permits fabrication of devices with gate lengths of less than 0.5 mu m using standard optical photolithography without recourse to deep UV or electron-beam lithography. The process is simple and easy to implement in a manufacturing environment. Exceptionally good gate-length control, typically 10% for a 0.4- mu m-long gate, is demonstrated. Yield of a 300- mu m-wide FET, designed for use in a gain block and in a switch, is found to be 89% on average. Data on wafer-to-wafer and on-wafer variations in device DC and RF parameters and equivalent circuit values are presented. Typical standard deviations are in the 5-10% range. This process technology has been used to fabricate a 17.5-GHz, 3-b phase-shift receive monolithic microwave integrated circuit (MMIC) of moderately high complexity. Statistics of RF data on 704 such devices, fabricated over a period of two years, are presented. It is shown that such MMICs can be fabricated with yields sufficient for prototype active phased-array antenna applications.< >
ISSN:0018-9383
1557-9646
DOI:10.1109/16.108181