Compact Neutralized SPDT Switch With High Pole-to-Throw and Throw-to-Throw Isolation

This article presents compact, high-isolation, and high-linearity single-pole double-throw (SPDT) switches utilizing a neutralization technique in a 28-nm CMOS process. The proposed SPDT switches consist of two high-isolation single-pole single-throw (SPST) switches, thereby simultaneously enhancing...

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Bibliographic Details
Published in:IEEE transactions on microwave theory and techniques 2025-11, Vol.73 (11), p.9196-9205
Main Authors: Hwang, Jun, Ju, Seokjun, Min, Byung-Wook
Format: Article
Language:English
Subjects:
Capacitance
Capacitors
CMOS
Equivalent circuits
high-isolation switch
high-linearity switch
Inductance
Insertion loss
Linearity
Logic gates
neutralization
Radio frequency
RF switch
single-pole double-throw (SPDT) switch
single-pole single-throw (SPST) switch
Switches
Switching circuits
Topology
Transistors
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