Distance-aware L2 cache organizations for scalable multiprocessor systems

In this paper, we suggest an LRU/distance-aware combined second-level (L2) cache for scalable CC-NUMA multiprocessors, which is composed of a traditional LRU cache and an additional cache maintaining the distance information of individual cache blocks. The LRU cache selects a victim using age inform...

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Bibliographic Details
Main Authors: Sung Woo Chung, Hyong-Shik Kim, Chu Shik Jhon
Format: Conference Proceeding
Language:English
Subjects:
Computer science
Delay
Digital systems
Hardware
Multiprocessing systems
Sections
Telecommunication traffic
Online Access:Request full text
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Summary:In this paper, we suggest an LRU/distance-aware combined second-level (L2) cache for scalable CC-NUMA multiprocessors, which is composed of a traditional LRU cache and an additional cache maintaining the distance information of individual cache blocks. The LRU cache selects a victim using age information, while the distance-aware cache does this using distance information. Both work together to reduce the overall distance effectively upon cache misses by keeping long-distance blocks as well as recently used blocks. It has been observed that the proposed cache outperforms the traditional LRU cache by up to 28% in the execution time. It is also found to perform even better than an LRU cache of twice the size.
DOI:10.1109/DSD.2003.1231896