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An Automated Approach to Inheritance and Polymorphic Testing using a VDM++ Specification
The use of formal methods is growing with the rapidly increasing applications of safety-critical systems in such fields as aviation, medicine, railways etc. The benefits of using formal methods are not limited to avoidance of specification errors and elimination of ambiguities only - a formal specif...
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Main Authors: | , , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
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Summary: | The use of formal methods is growing with the rapidly increasing applications of safety-critical systems in such fields as aviation, medicine, railways etc. The benefits of using formal methods are not limited to avoidance of specification errors and elimination of ambiguities only - a formal specification also provides a sound basis for generating test suites. However, most of the work in this area has focused on unit testing only. In object-oriented paradigm, inheritance and polymorphism are powerful features, yet they present new challenges to the testers. In this paper, the authors present a novel approach to automated generation of test cases from a VDM++ specification. The authors base the testing technique on Offutt et al.'s fault model for subtype inheritance and polymorphic testing. |
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DOI: | 10.1109/INMIC.2006.358168 |