Code compression for ARM7 embedded systems

A detailed analysis of different code compression algorithms is provided in this paper. The performances of the algorithms have been tested on ARM codes whose size is below 32 KB. Code compression performances have been considered including the compression overheads due to the decoding tables, to th...

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Bibliographic Details
Main Authors: Garofalo, V., Napoli, E., Petra, N., Strollo, A.G.M.
Format: Conference Proceeding
Language:English
Subjects:
Algorithm design and analysis
Clocks
Compression algorithms
Decoding
Delay
Embedded system
Engines
Hardware
Performance evaluation
Testing
Online Access:Request full text
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Summary:A detailed analysis of different code compression algorithms is provided in this paper. The performances of the algorithms have been tested on ARM codes whose size is below 32 KB. Code compression performances have been considered including the compression overheads due to the decoding tables, to the alignment and to the tables for random access to the compressed code. We have analyzed Huffman, Tunstall, LZ77 and Class-based techniques. Optimal performances are provided by Class Based algorithms with an average compression ratio of 64%. For this algorithm we have realized a static decompression engine that provides, after an initial latency of three clock cycles, one 32b instruction for clock cycle.
DOI:10.1109/ECCTD.2007.4529689