The Javelin: A Java accelerator based on hardware translation method

In this paper, we propose a Java accelerator named Javelin (Java enhanced language interpreter) based on a hardware translation method. To overcome performance hurdles in translation based accelerators, we assign registers in the host processor for frequently accessed pointers, entries of the stack,...

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Bibliographic Details
Main Authors: Jong-Sung Lee, Hyun-Gyu Kim
Format: Conference Proceeding
Language:English
Subjects:
Clocks
Costs
EISC
Energy efficiency
Frequency
Hardware
Hardware Translation
Java
Java Accelerator
Java Virtual Machine
Random access memory
Registers
Software performance
Virtual manufacturing
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Summary:In this paper, we propose a Java accelerator named Javelin (Java enhanced language interpreter) based on a hardware translation method. To overcome performance hurdles in translation based accelerators, we assign registers in the host processor for frequently accessed pointers, entries of the stack, local variables, and intermediate values during bytecode execution. We propose an operand exchange unit (OPEXU) for maximizing compatibility and a stack management unit (SMU) with a smart exception handler for minimizing the overhead by stack exceptions. Javelin increases hardware cost less than 9,000 gates including a 256-byte SRAM and does not decrease the clock frequency of host processor. In our experiments, Javelin provides approximately 24.3 times better performance than that of the pure software VM in terms of execution time and it also reduces the memory traffic during Java processing about 81.9%. Consequently, Javelin provides an energy efficient solution for Java processing.
DOI:10.1109/SOCDC.2008.4815648