Real-Time FPGA-Based Hardware-in-the-Loop Simulation Test Bench Applied to Multiple-Output Power Converters

This paper presents a hardware-in-the-loop (HIL) simulation technique applied to a series-resonant multiple-output inverter for new multi-inductor domestic induction heating platforms. The control of the topology is based on a system-on-programmable chip (SoPC) solution, which combines the MicroBlaz...

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Bibliographic Details
Published in:IEEE transactions on industry applications 2011-03, Vol.47 (2), p.853-860
Main Authors: Lucia, Oscar, Urriza, Isidro, Barragan, Luis A., Navarro, Denis, Jimenez, Oscar, Burdio, Jose M.
Format: Article
Language:English
Subjects:
C (programming language)
Computer architecture
Computer simulation
Converters
Electromagnetic induction
Embedded computer systems
Field programmable gate arrays
field-programmable gate arrays (FPGAs)
Firmware
Hardware
Inverters
Load modeling
Mathematical models
Microorganisms
modeling
Modulation
Platforms
Power converters
resonant inverters
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Summary:This paper presents a hardware-in-the-loop (HIL) simulation technique applied to a series-resonant multiple-output inverter for new multi-inductor domestic induction heating platforms. The control of the topology is based on a system-on-programmable chip (SoPC) solution, which combines the MicroBlaze embedded soft-core processor and a customized peripheral that generates the power converter control signals. The firmware is written in C, and the customized peripheral is described using a hardware description language. Simulating the whole system using digital or mixed-signal simulation tools is a very time-consuming task due to the embedded processor model complexity, and additionally, it does not support tracing C instructions. To overcome these limitations, this paper proposes a real-time simulation test bench. The embedded processor core, peripherals, and the power converter model are all implemented into the same field-programmable gate array (FPGA). Using the hardware and software debugging tools supplied by the FPGA vendor, currents and voltages of the power converter model are monitored, and firmware C instructions are traced while running on the embedded processor core. Then, it is presented a design flow that is proven to be an effective and low-cost solution to verify the functionality of the customized peripheral and to implement a platform to perform firmware verification.
ISSN:0093-9994
1939-9367
DOI:10.1109/TIA.2010.2102997