Performance metrics and empirical results of a PUF cryptographic key generation ASIC

We describe a PUF design with integrated error correction that is robust to various layout implementations and achieves excellent and consistent results in each of the following four areas: Randomness, Uniqueness, Bias and Stability. 133 PUF devices in 0.13 μm technology encompassing seven circuit l...

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Bibliographic Details
Main Authors: Meng-Day Mandel Yu, Sowell, R., Singh, A., M'Raihi, D., Devadas, S.
Format: Conference Proceeding
Language:English
Subjects:
Application specific integrated circuits
ASIC
Circuit stability
Cryptography
Error correction
Key Generation
Layout
NIST
NIST Randomness
Oscillators
Physical Unclonable Function (PUF)
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Description
Summary:We describe a PUF design with integrated error correction that is robust to various layout implementations and achieves excellent and consistent results in each of the following four areas: Randomness, Uniqueness, Bias and Stability. 133 PUF devices in 0.13 μm technology encompassing seven circuit layout implementations were tested. The PUF-based key generation design achieved less than 0.58 ppm failure rates with 50%+ stability safety margin. 1.75M error correction blocks ran error-free under worst-case V/T corners (±10% V, 125°C/-65°C) and under voltage extremes of ±20% V. All PUF devices demonstrated excellent NIST-random behavior (99 cumulative percentile), a criterion used to qualify random sources for use as keying material for cryptographic-grade applications.
DOI:10.1109/HST.2012.6224329