An Ultra Low Energy FSK Receiver With In-Band Interference Robustness Exploiting a Three-Phase Chirped LO

An ultra-low-energy Binary Frequency Shift Keying (BFSK) receiver is proposed. It features improved in-band interference tolerance by chirping the transmission frequency. To reduce the receiver power consumption, a novel three-phase passive mixer along with a three stage digitally controlled ring os...

Full description

Saved in:
Bibliographic Details
Published in:IEEE journal on emerging and selected topics in circuits and systems 2014-09, Vol.4 (3), p.248-261
Main Authors: Dutta, Ramen, van der Zee, Ronan, Kokkeler, Andre B. J., Bentum, Mark J., Klumperink, Eric A. M., Nauta, Bram
Format: Article
Language:English
Subjects:
Binary frequency shift keying (BFSK) demodulator
bit error rate (BER)
Chirp
chirp communication
direct conversion receiver
direct modulation
Frequency shift keying
I-Q receiver
Interference
interference robust
Mixers
passive mixer
Receivers
ring oscillator
Robustness
Semiconductors
single tone interference (STI)
Synchronization
three-phase
ultra low energy (ULE)
ultra low power
wireless sensor network (WSN)
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:An ultra-low-energy Binary Frequency Shift Keying (BFSK) receiver is proposed. It features improved in-band interference tolerance by chirping the transmission frequency. To reduce the receiver power consumption, a novel three-phase passive mixer along with a three stage digitally controlled ring oscillator is proposed, while still allowing quadrature detection. A mixer-first direct conversion receiver architecture moves the required gain to lowest frequency and lowest bandwidth to reduce power consumption. A low power flip-flop based BFSK demodulator is proposed that reduces the baseband power further. The receiver is designed and fabricated in a 65 nm complementary metal-oxide-semiconductor process. It consumes 219 μW from 1.2 V power supply, while having a sensitivity of -70 dBm for a bit error rate of 0.1% at 2.4 GHz. Except the off-chip 64 MHz clock generation, the total receiver requires 27 pJ/bit. Using a chirped clock spreading of 360 MHz and chirp repetition rate of 1 MHz, it can tolerate up to -8 dB signal to interference ratio for all interferer frequencies. This is 13.5 dB better than previously reported in literature and 12 dB better than ideal noncoherent BFSK receiver interference robustness.
ISSN:2156-3357
2156-3365
DOI:10.1109/JETCAS.2014.2337154