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An Improved Thermal Model for Static Optimization of Application Mapping and Scheduling in Multiprocessor System-on-Chip

With the increasing power density and number of cores integrated into a single chip, thermal management is widely recognized as one of the essential issues in Multi-Processor Systems-on-Chip (MPSoCs). An uncontrolled temperature could significantly decrease system performance, lead to high cooling a...

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Bibliographic Details
Main Authors: Juan Yi, Weichen Liu, Weiwen Jiang, Mingwen Qin, Lei Yang, Duo Liu, Chunming Xiao, Luelue Du, Sha, Edwin H.-M
Format: Conference Proceeding
Language:English
Subjects:
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Summary:With the increasing power density and number of cores integrated into a single chip, thermal management is widely recognized as one of the essential issues in Multi-Processor Systems-on-Chip (MPSoCs). An uncontrolled temperature could significantly decrease system performance, lead to high cooling and packaging costs, and even cause serious damage. These issues have made temperature one of the major factors that must be addressed in MPSoC designs. Static scheduling of applications should take the thermal effects of task executions into consideration to keep the chip temperature under a safety threshold. However, inaccurate temperature estimation would cause processor overheating or system performance degradation. In this paper, we propose an improved thermal modeling technique that can be used to predict the chip temperature more accurately and efficiently at design time. We further develop a simulated annealing (SA)-based algorithm to address the static application mapping and scheduling problem based on the improved thermal model. The thermal condition is greatly improved and the total energy consumption is minimized. Experimental results show that the improved thermal modeling technique could provide an average of over 99% accuracy of temperature prediction when comparing with the results offered by Hotspot simulations. Based on it, the SA-based algorithm could reduce the chances that the temperature threshold to be violated at runtime by 24.3%.
ISSN:2159-3469
2159-3477
DOI:10.1109/ISVLSI.2014.40