Exploring Parallel Game Architectures with Tardiness Policy

• Main Authors: Zamith, Marcelo, Valente, Luis, Feijo, Bruno, Joselli, Mark, Clua, Esteban
• Format: Conference Proceeding
• Language: English
• Subjects: Computers; Entertainment industry; game architectures; Games; heterogeneous and unconventional applications; parallel programming; tardiness
• ISSN: 2159-6662
• DOI: 10.1109/SBGames.2015.20

Computer games are real-time applications that create interactive virtual environments, usually as discrete time-stepped simulations. These simulations may have predefined time step sizes or may use variable time step sizes. These approaches are common in games, but not flexible. In the first approach, when the game runs on a machine with abundant resources, the game does not use the extra capacity to improve simulation quality (task results or presentation). The second approach usually runs the simulation as fast as possible, using the time elapsed between consecutive time steps to scale all computations, so as the simulation runs in real-time. However, this approach wastes processor time and energy and in multi-core hardware scenarios (e.g., GPUs and clusters), the problem of wasting computing resources becomes more severe. In this paper, we propose a parallel and adaptive architecture that employs tardiness policy in multi-core hardware to handle the aforementioned issues. The architecture uses tardiness policy to monitor and change task behavior according to the current conditions of he host hardware. On more powerful computers, the architecture is able to improve task quality if there is spare time available. On less powerful computers, the architecture restricts task functionality so that tasks are able to complete on time. We provide two examples to demonstrate how the architecture works.