Design Space Exploration of Memory Controller Placement in Throughput Processors with Deep Learning
As throughput-oriented processors incur a significant number of data accesses, the placement of memory controllers (MCs) has a critical impact on overall performance. However, due to the lack of a systematic way to explore the huge design space of MC placements, only a few ad-hoc placements have bee...
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| Published in: | IEEE computer architecture letters 2019-01, Vol.18 (1), p.51-54 |
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| Main Authors: | , , , |
| Format: | Article |
| Language: | English |
| Subjects: | |
| Citations: | Items that this one cites Items that cite this one |
| Online Access: | Get full text |
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