22.3 A 128Gb 8-High 512GB/s HBM2E DRAM with a Pseudo Quarter Bank Structure, Power Dispersion and an Instruction-Based At-Speed PMBIST

There is enormous demand for high-bandwidth DRAM: in application such as HPC, graphics, high-end server and artificial intelligence. HBM DRAM was developed [1] using the advances in package technology: TSV, microbump and silicon-interposer. Owing to these advances, HBM has a much higher bandwidth, a...

Full description

Saved in:
Bibliographic Details
Main Authors: Lee, Dong Uk, Cho, Ho Sung, Kim, Jihwan, Ku, Young Jun, Oh, Sangmuk, Dae Kim, Chul, Kim, Hyun Woo, Lee, Woo Young, Kim, Tae Kyun, Yun, Tae Sik, Kim, Min Jeong, Lim, SeungGyeon, Lee, Seong Hee, Yun, Byung Kuk, Moon, Jun Il, Park, Ji Hwan, Choi, Seokwoo, Park, Young Jun, Lee, Chang Kwon, Jeong, Chunseok, Lee, Jae-Seung, Lee, Sang Hun, We, Woo Sung, Yun, Jong Chan, Lee, Doobock, Shin, Junghyun, Kim, Seungchan, Lee, Junghwan, Choi, Jiho, Ju, Yucheon, Park, Myeong-Jae, Lee, Kang Seol, Hur, Youngdo, Shim, Daeyong, Lee, Sangkwon, Chun, Junhyun, Jin, Kyo-Won
Format: Conference Proceeding
Language:English
Subjects:
Bandwidth
Delays
Dispersion
Random access memory
Registers
Through-silicon vias
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:There is enormous demand for high-bandwidth DRAM: in application such as HPC, graphics, high-end server and artificial intelligence. HBM DRAM was developed [1] using the advances in package technology: TSV, microbump and silicon-interposer. Owing to these advances, HBM has a much higher bandwidth, at a lower pin speed rate, than conventional DRAM. However, the 3D-stack structure causes TSV interface and PDN problems: TSV connection failure and 3D-accumulation of IR drop, which increases the total cost of HBM. Moreover, as memory bandwidth increases DRAM architectural challenges arise, power consumption and associated thermal problems increase as well.
ISSN:2376-8606
DOI:10.1109/ISSCC19947.2020.9062977