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Design and Demonstration of Single and Coupled Embedded Toroidal Inductors for 48V to 1V Integrated Voltage Regulators

High-efficiency High-Voltage Integrated Voltage Regulators (HV-IVR) will allow the next generation of data centers and servers to operate with higher efficiency while delivering more computing power. High-density embedded inductors operating at frequencies over 10 MHz allows the miniaturization of p...

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Bibliographic Details
Main Authors: Alvarez, Claudio, Suresh, Srinidhi, Swaminathan, Madhavan, Tummala, Rao, Sasaki, Daisuke, Watanabe, Kazuki, Nagatsuka, Ryo, Ping Lin, Cheng, Wada, Tatsuyoshi, Watanabe, Naoki
Format: Conference Proceeding
Language:English
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Summary:High-efficiency High-Voltage Integrated Voltage Regulators (HV-IVR) will allow the next generation of data centers and servers to operate with higher efficiency while delivering more computing power. High-density embedded inductors operating at frequencies over 10 MHz allows the miniaturization of power modules enabling their integration closer to the SoC. However, single stage 48V to 1V IVR present new challenges that are not seen in low voltage converter such as 3.3V or 1.7V to 1V. In this work, a novel expandable interleaved toroidal inductor cell with vias-in-slot thru magnetic sheet is presented. In addition, we present a new metric for magnetic material and inductor technologies to describe their efficiency under different duty cycle conditions. Using the analysis of two available magnetic sheets with permeability 50 and 150 at 10MHz, we present the magnetic properties of a magnetic sheet to obtain 95% of inductor efficiency, an inductance density of 113 nH/mm 3 at 10 MHz, a saturation current over 2.5A, and DC resistance around 20 mΩ. These inductor requirements are given by the possible power stage topologies that can be used to achieve 48V to 1V, where some of them use single inductor while others use coupled or tapped inductors. The efficiency conditions for the inductor presented in this work must be matched by the power stage topology, leading to a co-design between power inductor and the power stage topology. In this work we present why the duty cycle must be extended by a factor of 4 in order to obtain a 95% efficiency in the inductor. We provide a process for the fabrication of these inductors. Finally, a test inductor is fabricated that shows an inductance density of 77 nH/mm 3 and correlates well with the simulation model. This allows to predict with good accuracy the inductor performance with the proposed inductor design and magnetic sheet properties.
ISSN:2377-5726
DOI:10.1109/ECTC32862.2020.00072