Secure Your SoC: Building System-an-Chip Designs for Security

• Main Authors: Bhasin, Shivam, Carlson, Trevor E., Chattopadhyay, Anupam, Kumar, Vinay B.Y., Mendelson, Avi, Poussier, Romain, Tavva, Yaswanth
• Format: Conference Proceeding
• Language: English
• Subjects: Conferences; Distance measurement; Hardware; Prototypes; Security; Side-channel attacks; System-on-chip
• ISSN: 2164-1706
• DOI: 10.1109/SOCC49529.2020.9524760

Modern System-on-Chip designs (SoCs) are becoming increasingly complex and powerful, catering to a wide range of application domains. Their use in security-critical tasks calls for a holistic approach to SoC design, including security as a first-class architecture constraint, rather than adding security only as an afterthought. The problem is compounded by the inclusion of multiple, potentially untrusted, third party components in the SoC design. To address this challenge systematically, this paper explores four distinct and important aspects of designing secure SoCs. First, starting at the component level, an evaluation framework for assessing component security against physical attacks is proposed. Second, a scalable simulation framework is developed to integrate these secure components which offers flexibility for early- and late-stage SoC development. Third, dynamic and static techniques are proposed to determine when the system is under attack, with a key focus on Hardware Trojans as threat. Finally, a design strategy for integrating untrusted components into a SoC through hardware Root-of-Trust is outlined. For each of these aspects we present early-stage evaluations, and show how these complement each other towards the design of a secure SoC.