Cooperative Buffer Management With Fine-Grained Data Migrations for Hybrid Memory Systems

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems 2023-06, Vol.42 (6), p.1838-1851
• Main Authors: Wang, Xiaoliang, Jin, Peiquan, Luo, Yongping, Chu, Zhaole, Yuan, Yigui, Zhao, Xujian, Lin, Yuanjing, Guo, Kuankuan
• Format: Article
• Language: English
• Subjects: Benchmark testing; Benchmarks; Buffer management; Buffers; Costs; data migration; Data storage; Dynamic random access memory; hybrid memory; Hybrid systems; Indexes; Machine learning; Memory management; persistent memory (PM); Production; Random access memory; Run time (computers)
• ISSN: 0278-0070; 1937-4151
• DOI: 10.1109/TCAD.2022.3210201

Hybrid memory composed of DRAM and persistent memory (PM) offers a promising way to realize large-capacity main memory supporting in-memory data storage and computing. However, traditional buffer management schemes focus on improving the hit ratio but lack awareness of the limitations of PM, e.g., slower write time and lower write endurance than DRAM. Therefore, developing new buffer management policies that can reduce costly write-backs of PM blocks while maintaining high performance for the hybrid buffer, is of paramount importance. Existing approaches mainly use a page-grained buffering policy, which will cause unnecessary data migrations between DRAM and PM, leading to a high number of disk I/Os and PM writes. Aiming to reduce I/O costs and PM writes, we propose a new buffer manager named HiBuffer for DRAM/PM-based hybrid memory systems. HiBuffer presents several novel ideas. First, it adopts multigrained data layouts to manage the hybrid buffer cooperatively. In addition to the page granularity, we introduce Lines for the DRAM buffer and Sectors to the PM buffer, forming a buffer with three granularities, including Line, Sector, and Page. We prove that the multigrained cooperative buffer management can deliver higher performance than existing page-grained schemes. Second, we propose a sector-grained method to migrate data from DRAM to PM, which can avoid unnecessary data movements and reduce PM writes. Third, we use an out-of-place updating mechanism to absorb updates in DRAM, which can further reduce the writes to PM. We compare HiBuffer with three existing schemes, including LRU, CLOCK-DWF, and MiniPage, on five synthetic workloads and the YCSB benchmark using real Intel Optane DC PM. The results in terms of various metrics, including running time, PM writes, hit ratio, and disk I/Os, suggest the efficiency of HiBuffer. In particular, HiBuffer reduces the running time by up to 37.8% and the writes to PM by up to 83% compared to the competitors when evaluated on the YCSB benchmark.