Spectre attack detection with Neutral Network on RISC-V processor

The goal of this study is to investigate the problem of caches side-channel attacks on the open-source RISC-V architecture. Traditionally, these concerns have been addressed by research into hardware enhancements or software defense strategies. Those methods are, unfortunately, extremely hard to acc...

Full description

Saved in:
Bibliographic Details
Main Authors: Le, Anh-Tien, Hoang, Trong-Thuc, Dao, Ba-Anh, Tsukamoto, Akira, Suzaki, Kuniyasu, Pham, Cong-Kha
Format: Conference Proceeding
Language:English
Subjects:
Cache Memory
Computer architecture
Hardware
Hardware Performance Counters
Neural networks
Neutral Network
Out of order
Real-time systems
RISC-V
Side-channel Attack
Side-channel attacks
Software
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:The goal of this study is to investigate the problem of caches side-channel attacks on the open-source RISC-V architecture. Traditionally, these concerns have been addressed by research into hardware enhancements or software defense strategies. Those methods are, unfortunately, extremely hard to accomplish or lead to significant performance degradation. In this article, we investigate at a system for identifying cache side-channel threats such Spectre in real time. We utilize performance counters inside the processor to track the processor's cache behavior and a neural network to evaluate the acquired data. Since the presence of cache side-channels typically results in a dramatically altered cache utilization behaviors, our neural network would take advantage of it and detect a Spectre attack in our test environment with an accuracy of more than 99%. To summarize, we are able to inform the user when a cache side-channel attack occurs using data from only four counters.
ISSN:2158-1525
DOI:10.1109/ISCAS48785.2022.9937212