Impact of Inherent Design Limitations for Cu-Sn SLID Microbumps on Its Electromigration Reliability for 3D ICs

• Published in: IEEE transactions on electron devices 2023-01, Vol.70 (1), p.222-229
• Main Authors: Tiwary, Nikhilendu, Ross, Glenn, Vuorinen, Vesa, Paulasto-Krockel, Mervi
• Format: Article
• Language: English
• Subjects: 3D ICs; Bonding; Copper; Current density; Cu–Sn solid–liquid interdiffusion (SLID) bonding; Electromigration; electromigration (EM); Failure analysis; heterogeneous integration; Integrated circuits; Interdiffusion; Intermetallic compounds; Proximity effects; Reliability; Resistance; Scanning electron microscopy; Thermal runaway; Thermography; Three-dimensional displays; Tin
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2022.3224892

Continuous scaling of package architectures requires small volume and high-density microbumps in 3D stacking, which often result in solders fully transforming to intermetallic compounds (IMCs). Cu-Sn solid-liquid interdiffusion (SLID) bonding is an attractive technology where the \mu bumps are fully composed of IMCs. In this work, test structures made up of Cu3Sn IMC \mu bump with a lateral dimension of 25 \mu \text{m}\,\,\times25\,\,\mu \text{m} and 50 \mu \text{m}\,\,\times50\,\,\mu \text{m} , respectively, were manufactured on a pair of 4-inch Si wafers demonstrating wafer-level bonding capability. Electromigration (EM) tests were performed for accelerated conditions at a temperature of 150 °C for various current densities ranging from \approx 2\times 10^{{4}} to {1} \times 10^{{5}} A/cm2. Scanning electron microscopy (SEM) and elemental dispersive spectroscopy (EDS) were employed to characterize the as-fabricated test structures. Due to Sn squeeze out, Cu3Sn was formed at undesired location at the upper Cu trace. Both nondestructive [lock-in thermography (LiT)] and destructive techniques were employed to analyze the failure locations after EM tests. It was observed that the likelihood of failure spots is the current crowding zone along the interconnects in 3D architectures, which gets aggravated due to the formation of Cu3Sn in undesirable locations. Thermal runaway was observed even in Cu3Sn, which has been shown to be EM-resistant in the past, thus underlining inherent design issues of \mu bumps utilizing SLID technology.