Compact ECDSA engine for IoT applications

Security problems introduced with rapid increase in deployment of Internet-of-Things devices can be overcome only with lightweight cryptographic schemes and modules. A compact prime field (GF(p)) elliptic curve digital signature algorithm (ECDSA) engine suitable for use in such applications is prese...

Full description

Saved in:
Bibliographic Details
Published in:Electronics letters 2016-07, Vol.52 (15), p.1310-1312
Main Author: Yalcin, T
Format: Article
Language:English
Subjects:
Algorithms
application specific integrated circuits
application‐specific processing units
Architecture
ASIC platform
Compact ECDSA engine
compact prime field elliptic curve digital signature algorithm
Cryptography
Devices
Digital signatures
dual‐port memory support
EC based schemes
Electronics
Engines
field programmable gate array
FPGA platform
Gates (circuits)
Information and communications
Internet of Things
IoT applications
microcoded controller
microcontrollers
public key cryptography
security problems
size 180 nm
Citations: Items that this one cites
Items that cite this one
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:Security problems introduced with rapid increase in deployment of Internet-of-Things devices can be overcome only with lightweight cryptographic schemes and modules. A compact prime field (GF(p)) elliptic curve digital signature algorithm (ECDSA) engine suitable for use in such applications is presented. Generic architecture of the engine makes it suitable for other elliptic curve (EC) based schemes (EC Diffie–Hellman key exchange, EC integrated encryption, EC factoring etc.) with slight modifications. The presented engine is composed of a simple microcoded controller and application-specific processing units. It can work with ECs of up to 256 bits, while 160-bit ECDSA signature generation takes 490 K cycles. The engine is implemented as an intellectual property (IP) in a 180 nm process. However, its architecture allows it to be implemented on any application specific integrated circuit (ASIC) or FPGA platform with dual-port memory support. In view of its gate count of 11,366 gate equivalents, the presented work is the most compact ECDSA engine with capability for a wide range of curves and different applications.
ISSN:0013-5194
1350-911X
1350-911X
DOI:10.1049/el.2016.0760