Recent trends in hardware security exploiting hybrid CMOS-resistive memory circuits

This paper provides a comprehensive review and insight of recent trends in the field of random number generator (RNG) and physically unclonable function (PUF) circuits implemented using different types of emerging resistive non-volatile (NVM) memory devices. We present a detailed review of hybrid RN...

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Bibliographic Details
Published in:Semiconductor science and technology 2017-12, Vol.32 (12), p.123001
Main Authors: Sahay, Shubham, Suri, Manan
Format: Article
Language:English
Subjects:
hardware security
OxRAM
PRNG
PUF
RNG
RRAM
STT-MRAM
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Summary:This paper provides a comprehensive review and insight of recent trends in the field of random number generator (RNG) and physically unclonable function (PUF) circuits implemented using different types of emerging resistive non-volatile (NVM) memory devices. We present a detailed review of hybrid RNG/PUF implementations based on the use of (i) Spin-Transfer Torque (STT-MRAM), and (ii) metal-oxide based (OxRAM), NVM devices. Various approaches on Hybrid CMOS-NVM RNG/PUF circuits are considered, followed by a discussion on different nanoscale device phenomena. Certain nanoscale device phenomena (variability/stochasticity etc), which are otherwise undesirable for reliable memory and storage applications, form the basis for low power and highly scalable RNG/PUF circuits. Detailed qualitative comparison and benchmarking of all implementations is performed.
ISSN:0268-1242
1361-6641
DOI:10.1088/1361-6641/aa8f07