Gate length and temperature dependence of negative differential transconductance in silicon quantum well metal-oxide-semiconductor field-effect transistors

Introducing quantum transport into silicon transistors in a manner compatible with industrial fabrication has the potential to transform the performance horizons of large scale integrated silicon devices and circuits. Explicit quantum transport as evidenced by negative differential transconductances...

Full description

Saved in:
Bibliographic Details
Published in:Journal of applied physics 2015-09, Vol.118 (12)
Main Authors: Naquin, Clint, Lee, Mark, Edwards, Hal, Mathur, Guru, Chatterjee, Tathagata, Maggio, Ken
Format: Article
Language:English
Subjects:
Applied physics
Carrier density
CARRIERS
CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS
DOPED MATERIALS
ELECTRIC POTENTIAL
FABRICATION
FIELD EFFECT TRANSISTORS
FREEZING OUT
INTERFACES
Ion implantation
Large scale integration
LENGTH
METALS
MOSFETs
OXIDES
PROCESSING
Quantum transport
QUANTUM WELLS
Semiconductor devices
SEMICONDUCTOR MATERIALS
SILICON
Silicon devices
Silicon transistors
TEMPERATURE DEPENDENCE
TEMPERATURE RANGE 0273-0400 K
Transconductance
Transistors
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:Introducing quantum transport into silicon transistors in a manner compatible with industrial fabrication has the potential to transform the performance horizons of large scale integrated silicon devices and circuits. Explicit quantum transport as evidenced by negative differential transconductances (NDTCs) has been observed in a set of quantum well (QW) transistors fabricated using industrial silicon complementary metal-oxide-semiconductor processing. Detailed gate length and temperature dependence characteristics of the NDTCs in these devices have been measured. The QW potential was formed via lateral ion implantation doping on a commercial 45 nm technology node process line, and measurements of the transfer characteristics show NDTCs up to room temperature. Gate length dependence of NDTCs shows a correlation of the interface channel length with the number of NDTCs formed as well as with the gate voltage (VG) spacing between NDTCs. The VG spacing between multiple NDTCs suggests a quasi-parabolic QW potential profile. The temperature dependence is consistent with partial freeze-out of carrier concentration against a degenerately doped background.
ISSN:0021-8979
1089-7550
DOI:10.1063/1.4931662