Design Optimization of Metal Nanocrystal Memory-Part I: Nanocrystal Array Engineering

The three-dimensional (3D) electrostatics together with the modified Wentzel-Kramers-Brillouin tunneling model has been implemented to simulate the programming and retention characteristics of the metal nanocrystal (NC) memories. Good agreements with experimental data are first demonstrated to calib...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2006-12, Vol.53 (12), p.3095-3102
Main Authors: Tuo-Hung Hou, Chungho Lee, Narayanan, V., Ganguly, U., Kan, E.C.
Format: Article
Language:English
Subjects:
Applied sciences
Design optimization
Design. Technologies. Operation analysis. Testing
Electronics
Electrostatics
Exact sciences and technology
Integrated circuits
Integrated circuits by function (including memories and processors)
modeling
Molecular electronics, nanoelectronics
nanocrystal (NC)
nonvolatile memories
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Studies
three dimensional (3-D)
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Summary:The three-dimensional (3D) electrostatics together with the modified Wentzel-Kramers-Brillouin tunneling model has been implemented to simulate the programming and retention characteristics of the metal nanocrystal (NC) memories. Good agreements with experimental data are first demonstrated to calibrate the transport parameters. In contrast to previous works, the 3D electrostatic effects investigated in this paper are proven very significant in the memory operations. Therefore, new design criteria of metal NC memories are investigated. Part I presents the physical model and the NC array design optimization. A sparse and large-size NC array, which is suitable for the one-dimensional narrow-channel memories, provides higher program/erase tunneling current density due to the field-enhancement effect and lower charging energy due to the large NC capacitance. On the other hand, to achieve a sufficient memory window, fast programming speed, and long retention time in the typical two-dimensional channel memories, a dense and large-size NC array is favorable while taking the tradeoff with the NC number density into account. Based on the same theoretical model, the authors continue in Part II to consider the design optimization when high-K dielectrics can be employed
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2006.885677