Top-down fabricated silicon nanowires under tensile elastic strain up to 4.5

• Published in: Nature communications 2012-10, Vol.3 (1), p.1096, Article 1096
• Main Authors: Minamisawa, R.A., Süess, M.J., Spolenak, R., Faist, J., David, C., Gobrecht, J., Bourdelle, K.K., Sigg, H.
• Format: Article
• Language: English
• Subjects: 639/301/357/1016; 639/925/927/1007; Humanities and Social Sciences; In Vitro Techniques; multidisciplinary; Nanotechnology - methods; Nanowires - chemistry; Science; Science (multidisciplinary); Silicon - chemistry; Tensile Strength
• ISSN: 2041-1723; 2041-1723
• DOI: 10.1038/ncomms2102

Strained Si nanowires are among the most promising transistor structures for implementation in very large-scale integration due to of their superior electrostatic control and enhanced transport properties. Realizing even higher strain levels within such nanowires are thus one of the current challenges in microelectronics. Here we achieve 4.5% of elastic strain (7.6 GPa uniaxial tensile stress) in 30 nm wide Si nanowires, which considerably exceeds the limit that can be obtained using SiGe-based virtual substrates. Our approach is based on strain accumulation mechanisms in suspended dumbbell-shaped bridges patterned on strained Si-on-insulator, and is compatible with complementary metal oxide semiconductor fabrication. Potentially, this method can be applied to any tensile prestrained layer, provided the layer can be released from the substrate, enabling the fabrication of a variety of strained semiconductors with unique properties for applications in nanoelectronics, photonics and photovoltaics. This method also opens up opportunities for research on strained materials. Strain in Si nanostructures is used to achieve higher carrier mobility, making these devices candidates for the next generation of transistors. Minamisawa et al . fabricate silicon nanowires subject to elastic tensile strain up to 4.5%, exceeding the limit achievable with the use of SiGe virtual substrates.