Power-Optimized Temperature-Distributed Digital Data Link

Interfacing superconducting rapid single flux quantum logic with room temperature electronics requires the development of low-power semiconductor circuitry capable of operating at tens of Gb/s while maintaining sufficient signal to noise to achieve acceptable bit-error-rates. Such data-links must op...

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Bibliographic Details
Published in:IEEE transactions on applied superconductivity 2015-06, Vol.25 (3), p.1-5
Main Authors: Ravindran, Prasana, Su-Wei Chang, Gupta, Deepnarayan, Inamdar, Amol, Dotsenko, Vladimir, Sarwana, Saad M., Bardin, Joseph C.
Format: Article
Language:English
Subjects:
Channels
Cryogenic SiGe amplifier
Cryogenics
Data transmission
Digital data
digital receiver
Electronics
Gain
Links
Logic
Noise
Power demand
rapid single flux quantum (RSFQ)
Semiconductor device measurement
Semiconductors
Superconductivity
superconductor
Transmission line measurements
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Description
Summary:Interfacing superconducting rapid single flux quantum logic with room temperature electronics requires the development of low-power semiconductor circuitry capable of operating at tens of Gb/s while maintaining sufficient signal to noise to achieve acceptable bit-error-rates. Such data-links must operate with sufficiently low power consumption to permit tens to hundreds of parallel channels to coexist in a single cryostat. This requires a careful trade-off between the power and noise performance of the cryogenically cooled digital amplifiers. Previously demonstrated ultra low-power cryogenic-to-room temperature digital data links have been limited to data rates on the order of a few Gb/s. In this paper we demonstrate a temperature distributed amplifier chain optimized for 30 Gb/s data transmission and consuming just 140 microwatts at 4 K.
ISSN:1051-8223
1558-2515
DOI:10.1109/TASC.2014.2372339