Hardware-assisted circumvention of self-hashing software tamper resistance

Self-hashing has been proposed as a technique for verifying software integrity. Appealing aspects of this approach to software tamper resistance include the promise of being able to verify the integrity of software independent of the external support environment, as well as the ability to integrate...

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Bibliographic Details
Published in:IEEE transactions on dependable and secure computing 2005-04, Vol.2 (2), p.82-92
Main Authors: van Oorschot, P.C., Somayaji, A., Wurster, G.
Format: Article
Language:English
Subjects:
application security
Application software
Central processing units
checksumming
CPUs
Cryptography
Design
Digital rights management
Digital signatures
Fault tolerance
Index Terms- Tamper resistance
Information systems
Kernel
operating system kernels
Operating systems
Process design
processor design
Proposals
Security
Security management
self-hashing
Software
Software design
Software development management
Software protection
Studies
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Summary:Self-hashing has been proposed as a technique for verifying software integrity. Appealing aspects of this approach to software tamper resistance include the promise of being able to verify the integrity of software independent of the external support environment, as well as the ability to integrate code protection mechanisms automatically. In this paper, we show that the rich functionality of most modern general-purpose processors (including UltraSparc, x86, PowerPC, AMD64, Alpha, and ARM) facilitate an automated, generic attack which defeats such self-hashing. We present a general description of the attack strategy and multiple attack implementations that exploit different processor features. Each of these implementations is generic in that it can defeat self-hashing employed by any user-space program on a single platform. Together, these implementations defeat self-hashing on most modern general-purpose processors. The generality and efficiency of our attack suggests that self-hashing is not a viable strategy for high-security tamper resistance on modern computer systems.
ISSN:1545-5971
0361-1434
1941-0018
DOI:10.1109/TDSC.2005.24