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Look-ahead mapping of Boolean functions in memristive crossbar array

Memristors have drawn the attention of researchers due to their unique non-volatile and logic design capabilities. Combining these two, a concept called in-memory computing has emerged, wherein the same memory unit is used for both storage and computation, which helps in overcoming the CPU-memory bo...

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Bibliographic Details
Published in:Integration (Amsterdam) 2019-01, Vol.64, p.152-162
Main Authors: Yadav, Dev Narayan, Thangkhiew, Phrangboklang L., Datta, Kamalika
Format: Article
Language:English
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Summary:Memristors have drawn the attention of researchers due to their unique non-volatile and logic design capabilities. Combining these two, a concept called in-memory computing has emerged, wherein the same memory unit is used for both storage and computation, which helps in overcoming the CPU-memory bottleneck in conventional processor architectures. In this paper, we propose a look-ahead strategy for Boolean functions using Memristor Aided LoGIC (MAGIC) design style in the memristive crossbar, which supports in-memory computing. First, the Boolean function is converted into a netlist of NOT and NOR gates using a logic synthesis tool. The proposed crossbar mapping tool then maps the gate netlist to the crossbar, and also generates the micro-operations needed to execute the gate operations. Experimental evaluation on ISCAS′85 benchmarks reports average improvements of 37.02%, 36.55%, 64.99% and 35.55% respectively in terms of memristor count, latency, crossbar size, and energy over a recently published work. Results were also reported for IWLS-2005 benchmarks. •An approach for mapping Boolean functions in memristor crossbar array using Look-Ahead Heuristic is proposed.•A single step copy operation is proposed for replicating data in the crossbar.•Latency is reduced by identifying parallel operations and efficient placement of gates.•The proposed synthesis approach ensure a compact crossbar architecture orientation.
ISSN:0167-9260
1872-7522
DOI:10.1016/j.vlsi.2018.10.001